1. Formal verification :
Author: Erik Seligman, Tom Schubert, M.V. Achutha Kiran Kumar
Library: Center and Library of Islamic Studies in European Languages (Qom)
Subject: Electronic circuits-- Testing,Integrated circuits-- Very large scale integration-- Design and construction,Verilog (Computer hardware description language)
Classification :
TK7867
2. Formal verification : an essential toolkit for modern VLSI design
Author: Erik Seligman, Tom Schubert, M. V. Achutha Kiran Kumar
Library: Library of Institute for Research in Fundamental Sciences (Tehran)
Subject: Testing ، Electronic circuits,Design and construction ، Integrated circuits -- Very large scale integration,، Verilog )Computer hardware description language(
Classification :
TK
7867
.
S46F6
